Kontakt
Raum: 43.2.410
Tel. 0731 - 50 26218
simon.wilhelmstaetter(at)uni-ulm.de
M.Sc. Simon Wilhelmstätter
Ich habe Elektrotechnik an der Universität Ulm studiert, wo ich 2020 meinen B.Sc. Abschluss mit Nebenfach Informatik und 2023 meinen M.Sc. Abschluss gemacht habe. Ab April 2022 absolvierte ich ein 7-monatiges Praktikum am Robert Bosch Forschungs - und Technologiezentrum in Sunnyvale, CA. Der Titel meiner Masterarbeit lautete "Design and Implementation of the Dataflow for a Versatile Neural-Network Inference-System".
Im September 2023 begann ich mit der Arbeit an meinem Ph.D. Abschluss am Institut für Mikroelektronik der Universität Ulm unter der Leitung von Prof. Dr.-Ing. Maurits Ortmanns.
Studentische Arbeiten
[mt] = Masterarbeit, [rp] = Bachelorarbeit
Aktuelle Arbeiten
- Alexander Harrer
Enabling the Inference of Transformer Networks on a RISC-V based System [mt] - Daniel Zell
Stochastic Methods for Side-Channel Attacks on FPGA-based Neural Network Accelerators [mt]
Abgeschlossene Arbeiten
- Mohamed Alsharkawy
Design of a Hardware in the Loop Test Setup for Neural Network Accelerators [mt]
Publikationen
2024
5.
Conrad,
J.;
Wilhelmstätter,
S.;
Asthana,
R.;
Belagiannis,
V.;
Ortmanns,
M.
Differentiable Cost Model for Neural-Network Accelerator Regarding Memory Hierarchy
IEEE Transactions on Circuits and Systems I: Regular Papers ( Early Access )
Oktober 2024
Differentiable Cost Model for Neural-Network Accelerator Regarding Memory Hierarchy
IEEE Transactions on Circuits and Systems I: Regular Papers ( Early Access )
Oktober 2024
| DOI: | 10.1109/TCSI.2024.3476534 |
4.
Conrad,
J.;
Kauffman,
J. G.;
Wilhelmstätter,
S.;
Asthana,
R.;
Belagiannis,
V.;
Ortmanns,
M.
Confidence Estimation and Boosting for Dynamic-Comparator Transient-Noise Analysis
22nd IEEE Interregional NEWCAS Conference (NEWCAS)
September 2024
Confidence Estimation and Boosting for Dynamic-Comparator Transient-Noise Analysis
22nd IEEE Interregional NEWCAS Conference (NEWCAS)
September 2024
| DOI: | 10.1109/NewCAS58973.2024.10666354 |
3.
Wilhelmstätter,
S.;
Conrad,
J.;
Upadhyaya,
D.;
Polian,
I.;
Ortmanns,
M.
Enabling Power Side-Channel Attack Simulation on Mixed-Signal Neural Network Accelerators
IEEE International Conference on Omni-Layer Intelligent Systems (COINS), London, UK
Juli 2024
Enabling Power Side-Channel Attack Simulation on Mixed-Signal Neural Network Accelerators
IEEE International Conference on Omni-Layer Intelligent Systems (COINS), London, UK
Juli 2024
2.
Conrad,
J.;
Wilhelmstätter,
S.;
Asthana,
R.;
Belagiannis,
V.;
Ortmanns,
M.
Too-Hot-to-Handle: Insights into Temperature and Noise Hyperparameters for Differentiable Neural-Architecture-Searches
6th IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Abu-Dhabi, UAE
April 2024
Too-Hot-to-Handle: Insights into Temperature and Noise Hyperparameters for Differentiable Neural-Architecture-Searches
6th IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Abu-Dhabi, UAE
April 2024
| DOI: | 10.1109/AICAS59952.2024.10595971 |
1.
Wilhelmstätter,
S.;
Conrad,
J.;
Upadhyaya,
D.;
Polian,
I.;
Ortmanns,
M.
Attacking a Joint Protection Scheme for Deep Neural Network Hardware Accelerators and Models
6th IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Abu Dhabi, UAE
April 2024
Attacking a Joint Protection Scheme for Deep Neural Network Hardware Accelerators and Models
6th IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Abu Dhabi, UAE
April 2024
| DOI: | 10.1109/AICAS59952.2024.10595935 |
Wissenschaftl. Mitarbeiter
