Contact
Room: 43.1.234
Telephone: +49 (0)731 50 26237
bjoern.driemeyer(at)uni-ulm.de
M.Sc. Björn Driemeyer
I studied electrical engineering at the University of Ulm where I received my B.Sc degree in 2018 and my M.Sc degree in 2020.
Beside my studies, I worked on several research projects dealing with RF hardware system design, 3D-RADAR grid-mapping and THz-sensing manufacturing. My masters-thesis covered the “investigation of dynamic-element-matching in high-speed delta-sigma ADCs”.
In July 2020 I started working towards my Ph.D. degree at the Institute of Microelectronics at the University of Ulm under the supervision of Prof. Dr.-Ing. Maurits Ortmanns. My research topic is the implementation of linearization techniques of wide-band, high-speed continuous-time delta-sigma ADCs.
Projects
VE-FIDES
B. Driemeyer: In daily life, we will increasingly need to rely on electronic components that are used, for example, in self-driving cars or service robots. To use electronics safely and reliably, we must be able to take a sovereign position in global value chains. This includes understanding the functionality of the installed components as well as ensuring supply security ... [more]
Student theses
[mt] = Masterarbeit, [rp] = Bachelorarbeit
Aktuelle Arbeiten
Abgeschlossene Arbeiten
- Moritz Braig
Identification of a Micro-controller Using ADC and DAC Non-Linearity [mt] - Luis Kraus
Implementation of a Closed-Loop Microcontroller-based ADC PUF [rp] - Jan Schneider
Design, Evaluation and Classification of PCB Fingerprints [rp]
Publications
2024
9.
Wiens,
D.-P.;
Driemeyer,
B.;
Ortmanns,
M.
A Mixed-Signal TIA with Input Restoring ADC
IEEE International Symposium on Circuits and Systems (ISCAS), Singapore
May 2024
A Mixed-Signal TIA with Input Restoring ADC
IEEE International Symposium on Circuits and Systems (ISCAS), Singapore
May 2024
| DOI: | 10.1109/ISCAS58744.2024.10557979 |
8.
Driemeyer,
B.;
Mandry,
H.;
Wiens,
D.-P.;
Becker,
J.;
Ortmanns,
M.
Optimisation of RO-PUF Design Parameters for Minimising the Effective Area per PUF Bit
IEEE International Symposium on Circuits and Systems (ISCAS), Singapore
May 2024
Optimisation of RO-PUF Design Parameters for Minimising the Effective Area per PUF Bit
IEEE International Symposium on Circuits and Systems (ISCAS), Singapore
May 2024
| DOI: | 10.1109/ISCAS58744.2024.10558478 |
2023
7.
Kässer,
P.;
Wagner,
J.;
Ismail,
O.;
Driemeyer,
B.;
Ortmanns,
M.
Quantizer Gain in Incremental Delta-Sigma ADCs
30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Istanbul, Turkiye, pp. 1-4
December 2023
Quantizer Gain in Incremental Delta-Sigma ADCs
30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Istanbul, Turkiye, pp. 1-4
December 2023
| DOI: | 10.1109/ICECS58634.2023.10382904 |
6.
Driemeyer,
B.;
Kässer,
P.;
Mandry,
H.;
Wiens,
D.-P.;
Ortmanns,
M.
A Feasibility Study on a Switched-Capacitor Based PUF in 28 nm Technology
30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Istanbul, Turkiye
December 2023
A Feasibility Study on a Switched-Capacitor Based PUF in 28 nm Technology
30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Istanbul, Turkiye
December 2023
| DOI: | 10.1109/ICECS58634.2023.10382899 |
5.
Driemeyer,
B.;
Kässer,
P.;
Ortmanns,
M.
Optimum Position of Digital DAC Error Correction relative to the Decimation Filter in ΔΣ ADCs
30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Istanbul, Turkiye
December 2023
Optimum Position of Digital DAC Error Correction relative to the Decimation Filter in ΔΣ ADCs
30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Istanbul, Turkiye
December 2023
| DOI: | 10.1109/ICECS58634.2023.10382885 |
4.
Wiens,
D.-P.;
Sporer,
M.;
Driemeyer,
B.;
Ortmanns,
M.
A Mixed-Signal Integrator-Differentiator-TIA
IEEE Transactions on Circuits and Systems--II: Express Briefs
September 2023
A Mixed-Signal Integrator-Differentiator-TIA
IEEE Transactions on Circuits and Systems--II: Express Briefs
September 2023
| DOI: | 10.1109/TCSII.2023.3318725 |
3.
Lippmann,
B.;
Hatsch,
J.;
Seidl,
S.;
Houdeau,
D.;
Subrahmanyam,
N. P.;
Schneider,
D.;
Safieh,
M.;
Passarelli,
A.;
Maftun,
A.;
Brunner,
M.;
Music,
T.;
Pehl,
M.;
Siddiqui,
T.;
Brederlow,
R.;
Schlichtmann,
U.;
Driemeyer,
B.;
Ortmanns,
M.;
Hesselbarth,
R.;
Hiller,
M.
VE-FIDES: Designing Trustworthy Supply Chains Using Innovative Fingerprinting Implementations
Design, Automation & Test in Europe Conference & Exhibition (DATE)
April 2023
VE-FIDES: Designing Trustworthy Supply Chains Using Innovative Fingerprinting Implementations
Design, Automation & Test in Europe Conference & Exhibition (DATE)
April 2023
| DOI: | 10.23919/DATE56975.2023.10137026 |
2022
2.
Driemeyer,
B.;
Mandry,
H.;
Wiens,
D.-P.;
Becker,
J.;
Ortmanns,
M.
PUF-Entropy Extraction of DAC Intersymbol-Interference using Continuous-Time Delta-Sigma ADCs
IEEE International Conference on Electronics, Circuits and Systems (ICECS)
October 2022
PUF-Entropy Extraction of DAC Intersymbol-Interference using Continuous-Time Delta-Sigma ADCs
IEEE International Conference on Electronics, Circuits and Systems (ICECS)
October 2022
| DOI: | 10.1109/ICECS202256217.2022.9971072 |
1.
Driemeyer,
B.;
Spiess,
J.;
Kauffman,
J. G.;
Ortmanns,
M.
Complexity Reduced LUT-Based DAC Correction in Continuous-Time Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS)
May 2022
Complexity Reduced LUT-Based DAC Correction in Continuous-Time Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS)
May 2022
| DOI: | 10.1109/ISCAS48785.2022.9937300 |