Institute of Microelectronics

M.Sc. Joschua Conrad

Joschua Conrad received the B.Eng. degree at Baden-Wuerttemberg Cooperative State University (DHBW) Stuttgart in 2016. In his studies and work at Eisenmann SE in Böblingen and Stuttgart, he designed object-orientated software for applications with real-time requirements in automation. During his master studies, he worked at the Institute of Microelectronics at Ulm University and developed a high SNDR filter and a high SNDR oscillator using PCBs and developed software solutions for requirements engineering at Gigatronik GmbH in Ulm. He finished his master thesis in 2019 at the Institute of Microelectronics with the topic "Design of a Ring Amplifier based Sigma Delta Modulator".
He now works under the supervision of Prof Dr.-Ing. Maurits Ortmanns in the fileld of mixed signal neural network processors.

Projects

Power-Efficient Deep Neural Networks based on Co-Optimization with Mixed-Signal Integrated Circuits

J. Conrad: EdgeAI is the distributed computing paradigm for executing machine-learning algorithms close to the sensor. Compared to centralized, e.g. cloud-based solutions, data security, low latency and bandwidth reduction are achieved. At the same time, there is the major problem that the power consumption of today's deep neural networks (the most common kind of machine-learning algorithm) is far too high for such applications ... [more]

Student Theses

[mt] = Masterarbeit, [rp] = Bachelorarbeit

Aktuelle Arbeiten

  • Johannes Stark
    Implementation of an In-Memory-Compute Circuit for the Inference of Neural Networks [mt]
  • Nour Elshahawy
    Evaluation of Methods for Benchmarking and Re-Using SRAM Memory [mt]

Abgeschlossene Arbeiten

  • Kilian Storch
    Evaluation of DRAM Links for Neural-Network Inference-Accelerators [mt]
  • Simon Wilhelmstätter
    Design and Implementation of the Dataflow for a Versatile Neural-Network Inference-System [mt]
  • Simone Steinhauser
    Investigation of the Data-Flow in a Neural-Netwok Inference System [rp]
  • Rawan Hagag
    Investigation and Design of Comparator Architectures for a SAR ADC in 28nm CMOS [rp]
  • Luca Krüger
    Analyzing the Influence of Neural-Network Hyperparameters on the Resilience over Mixed-Signal Hardware Errors [rp]
  • Biyi Jiang
    Modeling of Neural-Network Processing-Element Hardware on Algorithmic Level [mt]
  • Paul Kässer
    Development and Test of a Mixed-Signal Neural-Network Processing-Element [mt]
  • Franjo Lovric
    Evaluation of System-Level Structures for Neural-Network Accelerator Systems [mt]

Publications

2024

9.
Conrad, J.; Wilhelmstätter, S.; Asthana, R.; Belagiannis, V.; Ortmanns, M.
Differentiable Cost Model for Neural-Network Accelerator Regarding Memory Hierarchy
IEEE Transactions on Circuits and Systems I: Regular Papers ( Early Access )
October 2024
DOI:10.1109/TCSI.2024.3476534
8.
Conrad, J.; Kauffman, J. G.; Wilhelmstätter, S.; Asthana, R.; Belagiannis, V.; Ortmanns, M.
Confidence Estimation and Boosting for Dynamic-Comparator Transient-Noise Analysis
22nd IEEE Interregional NEWCAS Conference (NEWCAS)
September 2024
DOI:10.1109/NewCAS58973.2024.10666354
7.
Wilhelmstätter, S.; Conrad, J.; Upadhyaya, D.; Polian, I.; Ortmanns, M.
Enabling Power Side-Channel Attack Simulation on Mixed-Signal Neural Network Accelerators
IEEE International Conference on Omni-Layer Intelligent Systems (COINS), London, UK
July 2024
6.
Kässer, P.; Kaltenstadler, S.; Conrad, J.; Wagner, J.; Ismail, O.; Ortmanns, M.
Stability Prediction of Δ∑ Modulators using Artificial Neural Networks
IEEE International Symposium on Circuits and Systems (ISCAS), Singapore
May 2024
DOI:10.1109/ISCAS58744.2024.10557868
5.
Conrad, J.; Wilhelmstätter, S.; Asthana, R.; Belagiannis, V.; Ortmanns, M.
Too-Hot-to-Handle: Insights into Temperature and Noise Hyperparameters for Differentiable Neural-Architecture-Searches
6th IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Abu-Dhabi, UAE
April 2024
DOI:10.1109/AICAS59952.2024.10595971
4.
Wilhelmstätter, S.; Conrad, J.; Upadhyaya, D.; Polian, I.; Ortmanns, M.
Attacking a Joint Protection Scheme for Deep Neural Network Hardware Accelerators and Models
6th IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Abu Dhabi, UAE
April 2024
DOI:10.1109/AICAS59952.2024.10595935
3.
Asthana, R.; Conrad, J.; Dawoud, Y.; Ortmanns, M.; Belagiannis, V.
Multi-conditioned Graph Diffusion for Neural Architecture Search
Transactions on Machine Learning Research
March 2024
ISSN: 2835-8856
Weblink:https://openreview.net/forum?id=5VotySkajV

2021

2.
Conrad, J.; Jiang, B.; Kässer, P.; Belagiannis, V.; Ortmanns, M.
Nonlinearity Modeling for Mixed-Signal Inference Accelerators in Training Frameworks
28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 1-4
2021
DOI:10.1109/ICECS53924.2021.9665503

2020

1.
Conrad, J.; Vogelmann, P.; Mokhtar, M. A.; Ortmanns, M.
Design Approach for Ring Amplifiers
IEEE Transactions on Circuits and Systems I: Regular Papers
April 2020
DOI:10.1109/TCSI.2020.2986553

Research Assistent

Joschua Conrad